Digitizer and Channelizer for the CryoPAF

A cooled phased array feed for radio astronomy

Overview of the cryoPAF digitizer integrates 4 RF-ADCs from TI, allowing sampling rates up to 4 GS/s. Due to the high analog input bandwidth of the ADCs, signals up to 8 GHz can be captured. The digital output data of the four ADCs is transmitted via two FireFly fiber optics. In addition to a power supply unit to generate all voltages used on the board, a Xilinx Artix7 FPGA is used to initialize and control the ADCs and FireFlys.

© DSP MPIfR

Overview of the cryoPAF digitizer integrates 4 RF-ADCs from TI, allowing sampling rates up to 4 GS/s. Due to the high analog input bandwidth of the ADCs, signals up to 8 GHz can be captured. The digital output data of the four ADCs is transmitted via two FireFly fiber optics. In addition to a power supply unit to generate all voltages used on the board, a Xilinx Artix7 FPGA is used to initialize and control the ADCs and FireFlys.

© DSP MPIfR

Based on the experience gain by the digitizer and packetizer developments for MeerKAT and Effelsberg, a new system design for digitizer and channelizer is in development for the Cryogenic Phased Array Feed for Effelsberg (CryoPAF). One novel aspect of the split architecture is that approximately 800 multi-mode optical fibers are needed to transmit the digital data streams from the digitizer into the cryoPAF channelizers, located up to 200 m away.

The CryoPAF, a novel cooled multi-element radio receiver/camera, imposes a variety of requirements to the cryoPAF digitizer development, such as a very compact design, scalability, and safe operation under vacuum conditions are the major challenges. An additional challenge is to integrate all components in the digitizer in such a way that they create no electromagnetic interference in the RF signals. In particular, the switching regulators for the different operating voltages and the signal distribution circuits for the sample clock and the time reference must be designed to be "quiet".

Through careful selection of electronic components and an optimized PCB layout, a compact cryoPAF digitizer was developed that can sample eight RF channels at 2.5 GS/s and 12-bit resolution in a board volume of 110 × 140 × 20 mm. The following two figures show the block diagram and a photo of the cryoPAF digitizer.

Photo of the CryoPAF digitizer with power and signal supply circuit board.

© DSP MPIfR

Photo of the CryoPAF digitizer with power and signal supply circuit board.

© DSP MPIfR

The CrypoPAF channelizer will provide data packages per frequency channel instead of packages in time like the packetizer modules for MeerKAT or Effelsberg. For this the main new component in the channelizer concept is an over-sampled polyphase filter-bank (PFB) that transforms the incoming time-domain data into frequency-domain channels. Signal transition tests showed that the channelizer can be located up to 200 metre away from the digitiser and an early concept design has been developed, for which each CryoPAF channelizer receives data from one cryoPAF digitizer (8 RF signals).

Image shows the CryoPAF channelizer block diagram.

© DSP MPIfR

Image shows the CryoPAF channelizer block diagram.

© DSP MPIfR

The channelizer is based on a Xilinx VCU128 evaluation board, equipped with a Virtex UltraScale+ FPGA. An in-house developed interposer board completes the channelizer and is connected to the FMC+ interface of the evaluation board. The interposer board receives the digital RF signals from the digitizer via optical fibers and converts them back into electrical signals using FireFly modules, which allows the FPGA to process them. The interposer board is also equipped with a microcontroller, which provides a 100 Mbit/s Ethernet interface to a control computer. The channelizer processes the data acquired by the digitizer into 1024 frequency channels and the channelized frequency bands are transmitted via four QSFP28 interfaces (each with 100 Gbit/s Ethernet) and a switching fabric to the back-end for subsequent beamforming of the CryoPAF.